RISC-V: implement __lshrti3.
authorAlex Guo <xfguo@jlsemi.com>
Sun, 29 Jul 2018 01:14:47 +0000 (01:14 +0000)
committerPalmer Dabbelt <palmer@sifive.com>
Mon, 13 Aug 2018 15:31:30 +0000 (08:31 -0700)
commita89757daf25cfe5320a5f40773271d86e2456c10
treef9b2fde77d6093253ae8b73be93530486e6c8781
parent4938c79bd0f5f3650c8c2cd4cdc972f0a6962ce4
RISC-V: implement __lshrti3.

Signed-off-by: Alex Guo <xfguo@jlsemi.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
arch/riscv/Makefile
arch/riscv/lib/Makefile
arch/riscv/lib/tishift.S [new file with mode: 0644]