Documentation/x86: Document resctrl's new sparse_masks
authorFenghua Yu <fenghua.yu@intel.com>
Tue, 10 Oct 2023 10:42:39 +0000 (12:42 +0200)
committerBorislav Petkov (AMD) <bp@alien8.de>
Wed, 11 Oct 2023 19:52:10 +0000 (21:52 +0200)
commitaaa5fa35743ab9f0726568611a85e3e15349b9bf
treec1aacc4042bb469e7e78d0c3f5cdf97c6d163d42
parent4dba8f10b8fef9c5b0f9ed83dd1af91a1795ead1
Documentation/x86: Document resctrl's new sparse_masks

The documentation mentions that non-contiguous bit masks are not
supported in Intel Cache Allocation Technology (CAT).

Update the documentation on how to determine if sparse bit masks are
allowed in L2 and L3 CAT.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Peter Newman <peternewman@google.com>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Reviewed-by: Babu Moger <babu.moger@amd.com>
Tested-by: Peter Newman <peternewman@google.com>
Link: https://lore.kernel.org/r/3e9610997164f648e15c5c2e90d4944ce36504fe.1696934091.git.maciej.wieczor-retman@intel.com
Documentation/arch/x86/resctrl.rst