RISC-V: KVM: selftests: Add get-reg-list test for STA registers
authorAndrew Jones <ajones@ventanamicro.com>
Wed, 20 Dec 2023 16:00:26 +0000 (17:00 +0100)
committerAnup Patel <anup@brainfault.org>
Sat, 30 Dec 2023 05:56:47 +0000 (11:26 +0530)
commitaad86da229bc9d0390dc2c02eb0db9ab1f50d059
tree8b8a813ae2486976a199a1abbdceb845a4bfbb06
parent60b6e31c499643b25d4b3ccb4cc8e365dfdb8863
RISC-V: KVM: selftests: Add get-reg-list test for STA registers

Add SBI STA and its two registers to the get-reg-list test.

Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
tools/testing/selftests/kvm/riscv/get-reg-list.c