target/riscv: Check memory access to meet svukte rule
authorFea.Wang <fea.wang@sifive.com>
Tue, 3 Dec 2024 03:49:30 +0000 (11:49 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 20 Dec 2024 01:22:47 +0000 (11:22 +1000)
commitab348b09823cb2d50271dcb039350bfb25d86aad
tree3fb0539a50ae087a9a376dcf9bbd3296efe30a22
parent19eb69d09a3e1c3c6fef75d0679ee8b3078b82a2
target/riscv: Check memory access to meet svukte rule

Follow the Svukte spec, do the memory access address checking

1. Include instruction fetches or explicit memory accesses
2. System run in effective privilege U or VU
3. Check senvcfg[UKTE] being set, or hstatus[HUKTE] being set if
instruction is HLV, HLVX, HSV and execute from U mode to VU mode
4. Depend on Sv39 and check virtual addresses bit[SXLEN-1]
5. Raises a page-fault exception corresponding to the original access
type.

Ref: https://github.com/riscv/riscv-isa-manual/pull/1564/files

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Signed-off-by: Fea.Wang <fea.wang@sifive.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241203034932.25185-5-fea.wang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu_helper.c