target/riscv: Fix vill field write in vtype
authorLIU Zhiwei <zhiwei_liu@c-sky.com>
Tue, 1 Feb 2022 06:46:01 +0000 (14:46 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 16 Feb 2022 02:24:18 +0000 (12:24 +1000)
commitac6bcf4d467a091b11ece782f4bf0a41e0f59cef
treefd452ecad7a969b35b0de6b508ba09fa887318ac
parent34888f01b7a905bbbddf1fc8f41691f43b94fcd6
target/riscv: Fix vill field write in vtype

The guest should be able to set the vill bit as part of vsetvl.

Currently we may set env->vill to 1 in the vsetvl helper, but there
is nowhere that we set it to 0, so once it transitions to 1 it's stuck
there until the system is reset.

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220201064601.41143-1-zhiwei_liu@c-sky.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/vector_helper.c