target/riscv/cpu.c: Add 'fcsr' register to QEMU log as a part of F extension
authorMaria Klauchek <m.klauchek@syntacore.com>
Mon, 2 Sep 2024 10:34:33 +0000 (13:34 +0300)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 2 Oct 2024 05:11:51 +0000 (15:11 +1000)
commitaf0b5b7b2a3bd78cd1a01115103c28e2f54d34bc
tree1b7042ba79eb74b903627e1654af0853cd0ff739
parent2d2e3bdc6922553823b7f74fe290805ff49afb32
target/riscv/cpu.c: Add 'fcsr' register to QEMU log as a part of F extension

FCSR is a part of F extension. Print it to log if FPU option is enabled.

Signed-off-by: Maria Klauchek <m.klauchek@syntacore.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240902103433.18424-1-m.klauchek@syntacore.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c