drm/amd/display: use uclk pstate latency for fw assisted mclk validation dcn32
authorDillon Varone <Dillon.Varone@amd.com>
Thu, 3 Nov 2022 22:38:13 +0000 (18:38 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Nov 2022 18:35:15 +0000 (13:35 -0500)
commitaf54c2142e82717842340574536da042ae168d0b
tree09aa133935b929c102383e50d8b8949110a8d0ef
parentc9e6aeb5885da86d417ce11e0f54416122665e19
drm/amd/display: use uclk pstate latency for fw assisted mclk validation dcn32

[WHY?]
DCN32 uses fclk pstate watermarks for dummy pstate, and must always be
supported.

[HOW?]
Validation needs to be run with fclk pstate latency set
as the dummy pstate latency to get correct prefetch and bandwidth outputs.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c