riscv: dts: starfive: add assigned-clock* to limit frquency
authorWilliam Qiu <william.qiu@starfivetech.com>
Fri, 22 Sep 2023 06:28:34 +0000 (14:28 +0800)
committerConor Dooley <conor.dooley@microchip.com>
Sat, 30 Sep 2023 08:58:30 +0000 (09:58 +0100)
commitaf571133f7ae028ec9b5fdab78f483af13bf28d3
treecb477c7a1ce4e73986267c24fe35ed26e6709a8b
parentbe326bee09374a2ebd18cb5af8fcd6f1e7825260
riscv: dts: starfive: add assigned-clock* to limit frquency

In JH7110 SoC, we need to go by-pass mode, so we need add the
assigned-clock* properties to limit clock frquency.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi