hw/intc/imsic: refine the IMSIC realize
authorYong-Xuan Wang <yongxuan.wang@sifive.com>
Mon, 24 Feb 2025 02:57:18 +0000 (10:57 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 4 Mar 2025 05:42:54 +0000 (15:42 +1000)
commitafd4f4aa7f605caf8efa2f3c590e1f2572f1ea50
tree0f8f88401b1c922835d993955064fb20fc83007f
parent1887cf2368189087fdf977fb8d09b5ad47cc7aea
hw/intc/imsic: refine the IMSIC realize

When the IMSIC is emulated in the kernel, the GPIO output lines to CPUs
and aia_ireg_rmw_fn setting can be remove. In this case the IMSIC
trigger CPU interrupts by KVM APIs, and the RMW of IREG is handled in
kernel.

This patch also move the code that claim the CPU interrupts to the
beginning of IMSIC realization. This can avoid the unnecessary resource
allocation before checking failed.

Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20250224025722.3999-2-yongxuan.wang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/intc/riscv_imsic.c