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target-arm: A64: add support for add, addi, sub, subi
authorAlex Bennée <alex.bennee@linaro.org>
Mon, 23 Dec 2013 23:27:29 +0000 (23:27 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 23 Dec 2013 23:27:29 +0000 (23:27 +0000)
commitb0ff21b4f96fa8223ec252ec3e99a8a9af86cf0c
treef93a28975de5f8b151e6d2d80c0280028badd345tree | snapshot
parenta5e94a9d767b2111608fe2013492392c7117cef5commit | diff
target-arm: A64: add support for add, addi, sub, subi

Implement the non-carry forms of addition and subtraction
(immediate, extended register and shifted register).
This includes the code to calculate NZCV if the instruction
calls for setting the flags.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
target-arm/translate-a64.c diff | blob | history
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