projects / qemu.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: f7b9358) | patch
hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 17 Jun 2016 14:23:47 +0000 (15:23 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 17 Jun 2016 14:23:51 +0000 (15:23 +0100)
commitb1a0eb777d9304ad69c577d5fdd8e20e4bf5644f
tree9d0ca8f7f1fa404bb28f0849d8ef1b2a5bbb9091tree | snapshot
parentf7b9358e2cf12a5eb07f5f9301fdadc932f9ee03commit | diff
hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers

Implement the registers in the GICv3 CPU interface which generate
new SGI interrupts.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-18-git-send-email-peter.maydell@linaro.org
hw/intc/arm_gicv3_cpuif.c diff | blob | history
hw/intc/arm_gicv3_redist.c diff | blob | history
hw/intc/gicv3_internal.h diff | blob | history
trace-events diff | blob | history
Unnamed repository; edit this file 'description' to name the repository.