riscv/barrier: Define RISCV_FULL_BARRIER
authorEric Chan <ericchancf@google.com>
Sat, 17 Feb 2024 13:13:02 +0000 (13:13 +0000)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 20 Mar 2024 01:52:23 +0000 (18:52 -0700)
commitb3c8064ccc447be45a3bdc2c4a9ea0491f011920
tree1b3c8d45dbac207efd5bde0a529fe1a41410539b
parent89f4fd7b1ab7733d9d817e7123c58996ca38ae98
riscv/barrier: Define RISCV_FULL_BARRIER

Introduce RISCV_FULL_BARRIER and use in arch_atomic* function.
like RISCV_ACQUIRE_BARRIER and RISCV_RELEASE_BARRIER, the fence
instruction can be eliminated When SMP is not enabled.

Signed-off-by: Eric Chan <ericchancf@google.com>
Reviewed-by: Andrea Parri <parri.andrea@gmail.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
Link: https://lore.kernel.org/r/20240217131302.3668481-1-ericchancf@google.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/atomic.h
arch/riscv/include/asm/cmpxchg.h
arch/riscv/include/asm/fence.h