hw/riscv: Support to load DTB after 3GB memory on 64-bit system.
authorJim Shu <jim.shu@sifive.com>
Wed, 20 Nov 2024 15:39:33 +0000 (23:39 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 20 Dec 2024 01:22:47 +0000 (11:22 +1000)
commitb4132a9e62978e247bce66e70499c4e2cad8d870
treea9efc023a17630dd15c0b9de7067cfc321c39597
parentd2ed9fffba07a7ce87f33d5b9662e3e8eadb11d4
hw/riscv: Support to load DTB after 3GB memory on 64-bit system.

Larger initrd image will overlap the DTB at 3GB address. Since 64-bit
system doesn't have 32-bit addressable issue, we just load DTB to the end
of dram in 64-bit system.

Signed-off-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20241120153935.24706-2-jim.shu@sifive.com>
[ Changes by AF
 -  Store fdt_load_addr_hi32 in the reset vector
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/riscv/boot.c
hw/riscv/microchip_pfsoc.c
hw/riscv/sifive_u.c
hw/riscv/spike.c
hw/riscv/virt.c
include/hw/riscv/boot.h