thermal: ti-soc-thermal: Skip pointless register access for dra7
authorTony Lindgren <tony@atomide.com>
Fri, 5 Feb 2021 13:45:31 +0000 (15:45 +0200)
committerDaniel Lezcano <daniel.lezcano@linaro.org>
Mon, 15 Feb 2021 20:18:32 +0000 (21:18 +0100)
commitb57b4b4d4ef9c2ecb169775815bebab0890cda50
treec5bffc5a536ee5c05c824398e62c333430b5e0bd
parent73da3f0cca94555d08d62b60ec9b8b9582bc1313
thermal: ti-soc-thermal: Skip pointless register access for dra7

On dra7, there is no Start of Conversion (SOC) register bit and we have an
empty bgap_soc_mask in the configuration for the thermal driver. Let's not
do pointless reads and writes with the empty mask.

There's also no point waiting for End of Conversion bit (EOCZ) to go high
on dra7. We only care about it going down, and are now mostly timing out
waiting for EOCZ high while it has already gone down.

When we add checking for the timeout errors in a later patch, waiting for
EOCZ high would cause bogus time out errors.

Cc: Adam Ford <aford173@gmail.com>
Cc: Carl Philipp Klemm <philipp@uvos.xyz>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: H. Nikolaus Schaller <hns@goldelico.com>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Adam Ford <aford173@gmail.com> #logicpd-torpedo-37xx-devkit
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210205134534.49200-2-tony@atomide.com
drivers/thermal/ti-soc-thermal/ti-bandgap.c