iio: potentiometer: ad5110: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:57:00 +0000 (18:57 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:19 +0000 (11:53 +0100)
commitb5841c38cb2f7e54b0787b3e0326a6b21b89ea3e
tree64664b13b76e09d1669eeed907361ed60808995b
parent54e03562bb960e78af050d2e550c28d77642ee44
iio: potentiometer: ad5110: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: d03a74bfacce ("iio: potentiometer: Add driver support for AD5110")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Mugilraj Dhavachelvan <dmugil2000@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-81-jic23@kernel.org
drivers/iio/potentiometer/ad5110.c