clk: qcom: ipq8074: Use floor ops for SDCC1 clock
authorDirk Buchwalder <buchwalder@posteo.de>
Thu, 10 Feb 2022 17:31:00 +0000 (18:31 +0100)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Thu, 24 Feb 2022 19:54:17 +0000 (13:54 -0600)
commitb77d8306d84f83d1da68028a68c91da9c867b6f6
treef83cba7fe5c5d1076a7efe15b8a1873566543bf7
parent2564aa7544f493c64b397e02a2b477591016aa24
clk: qcom: ipq8074: Use floor ops for SDCC1 clock

Use floor ops on SDCC1 APPS clock in order to round down selected clock
frequency and avoid overclocking SD/eMMC cards.

For example, currently HS200 cards were failling tuning as they were
actually being clocked at 384MHz instead of 192MHz.
This caused some boards to disable 1.8V I/O and force the eMMC into the
standard HS mode (50MHz) and that appeared to work despite the eMMC being
overclocked to 96Mhz in that case.

There was a previous commit to use floor ops on SDCC clocks, but it looks
to have only covered SDCC2 clock.

Fixes: 9607f6224b39 ("clk: qcom: ipq8074: add PCIE, USB and SDCC clocks")
Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de>
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220210173100.505128-1-robimarko@gmail.com
drivers/clk/qcom/gcc-ipq8074.c