riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs
authorEmil Renner Berthing <kernel@esmil.dk>
Thu, 30 Nov 2023 15:19:27 +0000 (16:19 +0100)
committerConor Dooley <conor.dooley@microchip.com>
Wed, 13 Dec 2023 15:50:23 +0000 (15:50 +0000)
commitba0074972ee9b3231b3de44650583654422e9758
tree0115e2e3344fde7997f86ab444ab8f4212eb06c0
parentdd3c1b365fe92eefeae8bb0ac08e29b7ccdc3ca7
riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs

The StarFive JH7100 SoC has non-coherent device DMAs, so mark the
soc bus as such.

Link: https://github.com/starfive-tech/JH7100_Docs/blob/main/JH7100%20Cache%20Coherence%20V1.0.pdf
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/starfive/jh7100.dtsi