phy: qcom-qmp-ufs: Add support for configuring PHY in HS G4 mode
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Sat, 14 Jan 2023 07:10:02 +0000 (12:40 +0530)
committerVinod Koul <vkoul@kernel.org>
Tue, 17 Jan 2023 06:24:57 +0000 (11:54 +0530)
commitbaf8d17e2cd1e73ca7c0a97224b3b6c934b879d4
tree7eacc788e8378d214c88ec3252d918fd52bf6388
parent69d2f980b68d9c3a50220ac1619210a8701f9474
phy: qcom-qmp-ufs: Add support for configuring PHY in HS G4 mode

Add separate tables_hs_g4 instance to allow the PHY driver to configure the
PHY in HS G4 mode. The individual SoC configs need to supply the Rx, Tx and
PCS register setting in tables_hs_g4 and the UFS driver can request the
Hs G4 mode by calling phy_set_mode_ext() with submode set to UFS_HS_G4.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230114071009.88102-6-manivannan.sadhasivam@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c