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(parent: 35ac9e3) | patch
target-mips: add SIGRIE instruction
authorYongbok Kim <yongbok.kim@imgtec.com>
Thu, 29 Oct 2015 15:18:38 +0000 (15:18 +0000)
committerLeon Alrae <leon.alrae@imgtec.com>
Fri, 30 Oct 2015 14:36:19 +0000 (14:36 +0000)
commitbb238210bb096534b68dab15a87c6ff0bef43672
treee05337cda587d151dd9f6e611e6284077c29621etree | snapshot
parent35ac9e342e008e3d47ef18d33a6977fdb99de9cdcommit | diff
target-mips: add SIGRIE instruction

Add SIGRIE (Signal Reserved Instruction Exception) for both MIPS and
microMIPS.
The instruction allows to use the 16-bit code field for software use.
This instruction is introduced by and required as of Release 6.

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
target-mips/translate.c diff | blob | history
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