clk: mstar: MStar/SigmaStar MPLL driver
authorDaniel Palmer <daniel@0x0f.com>
Thu, 11 Feb 2021 05:22:03 +0000 (14:22 +0900)
committerStephen Boyd <sboyd@kernel.org>
Sun, 14 Feb 2021 20:38:00 +0000 (12:38 -0800)
commitbef7a78da71687838a6bb5b316c4f5dfd31582f5
treefc1b40f8f481800f3b3d12ea06c3db2f278e400e
parent0b9266d295cee170509539635b8d572abe5267af
clk: mstar: MStar/SigmaStar MPLL driver

This adds a basic driver for the MPLL block found in MStar/SigmaStar
ARMv7 SoCs.

Currently this driver is only good for calculating the rates of it's
outputs and the actual configuration must be done before the kernel
boots. Usually this is done even before u-boot starts.

This driver targets the MPLL block found in the MSC313/MSC313E but
there is no documentation this chip so the register descriptions for
the another MStar chip the MST786 were used as they seem to match.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210211052206.2955988-5-daniel@0x0f.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
MAINTAINERS
drivers/clk/Kconfig
drivers/clk/Makefile
drivers/clk/mstar/Kconfig [new file with mode: 0644]
drivers/clk/mstar/Makefile [new file with mode: 0644]
drivers/clk/mstar/clk-msc313-mpll.c [new file with mode: 0644]