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RISCV: KVM: Add sstateen0 to ONE_REG
authorMayuresh Chitale <mchitale@ventanamicro.com>
Wed, 13 Sep 2023 16:39:05 +0000 (22:09 +0530)
committerAnup Patel <anup@brainfault.org>
Thu, 12 Oct 2023 13:14:13 +0000 (18:44 +0530)
commitc04913f2b54ee86be34d1a1e9df7b7876b12b8c0
treea94f8b9f05755e3c510e5e32230183faa27d6564tree | snapshot
parent81f0f314fec92a69d6c4951b9d9db21d37419669commit | diff
RISCV: KVM: Add sstateen0 to ONE_REG

Add support for sstateen0 CSR to the ONE_REG interface to allow its
access from user space.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/uapi/asm/kvm.h diff | blob | history
arch/riscv/kvm/vcpu_onereg.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git