pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T
authorBilly Tsai <billy_tsai@aspeedtech.com>
Wed, 13 Mar 2024 09:28:09 +0000 (17:28 +0800)
committerLinus Walleij <linus.walleij@linaro.org>
Thu, 28 Mar 2024 09:15:15 +0000 (10:15 +0100)
commitc10cd03d69403fa0f00be8631bd4cb4690440ebd
tree7dca67872d187922b45dbd0fa85a0607780d8b24
parent4cece764965020c22cff7665b18a012006359095
pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T

The register offset to disable the internal pull-down of GPIOR~T is 0x630
instead of 0x620, as specified in the Ast2600 datasheet v15
The datasheet can download from the official Aspeed website.

Fixes: 15711ba6ff19 ("pinctrl: aspeed-g6: Add AST2600 pinconf support")
Reported-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Message-ID: <20240313092809.2596644-1-billy_tsai@aspeedtech.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c