hw/isa/piix4: Correct IRQRC[A:D] reset values
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Wed, 26 Oct 2022 19:06:36 +0000 (21:06 +0200)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Fri, 13 Jan 2023 08:32:32 +0000 (09:32 +0100)
commitc12b1e67d50c01f6ba78abcdaaa533abaf71b664
tree2326cfa24d95d05c9b2bd7ade95361b1903b0b81
parent1953dfa80e0fc44a8ccfc97b4ada941e9383bba7
hw/isa/piix4: Correct IRQRC[A:D] reset values

IRQRC[A:D] registers reset value is 0x80. We were forcing
the MIPS Malta machine routing to be able to boot a Linux
kernel without any bootloader.
We now have these registers initialized in the Malta machine
write_bootloader(), so we can use the correct reset values.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221027204720.33611-4-philmd@linaro.org>
hw/isa/piix4.c