drm/i915/xe2lpd: Add display power well
authorRavi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com>
Tue, 19 Sep 2023 19:21:26 +0000 (12:21 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Thu, 21 Sep 2023 15:18:07 +0000 (08:18 -0700)
commitc2d9d8e7ee157f0ef78bcf5c0df149a4a03ae1cd
tree679d8ec36155d9daf1cb6451c1f80b1c987f3feb
parent394b4b7df9f791dc2dcc95f29cda0961900da6e9
drm/i915/xe2lpd: Add display power well

Add Display Power Well for Xe2_LPD. It's mostly the same as Xe_LPD+,
so reuse the code. PGPICA1 contains type-C capable port slices
which requires the well to power powered up, so add new power well
definition for it.

The DC_OFF fake power well will be added in a follow up commit.

v2: Do not rmw as bit 31 is the only R/W bit in the register (Matt Roper)

BSpec: 68886
Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230919192128.2045154-20-lucas.demarchi@intel.com
drivers/gpu/drm/i915/display/intel_display_power_map.c
drivers/gpu/drm/i915/display/intel_display_power_well.c
drivers/gpu/drm/i915/display/intel_display_power_well.h
drivers/gpu/drm/i915/display/intel_dp_aux_regs.h