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media: ccs-pll: Don't use div_u64 to divide a 32-bit number
authorSakari Ailus <sakari.ailus@linux.intel.com>
Thu, 25 Jun 2020 12:13:55 +0000 (14:13 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Mon, 7 Dec 2020 14:34:47 +0000 (15:34 +0100)
commitc3833a228cef7121cb7fc64d5ef71eedcc6f2f01
tree7312741116b1d6b6e9cca1ab2fc788a8e98b5479tree | snapshot
parent583791191c6d52528ae13a1812ecae43dfa12440commit | diff
media: ccs-pll: Don't use div_u64 to divide a 32-bit number

pll->pll_op_clk_freq is a 32-bit number. It does not need div_u64 to
divide it.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/media/i2c/ccs-pll.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git