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perf/x86/msr: Add Jasper Lake support
authorKan Liang <kan.liang@linux.intel.com>
Mon, 28 Sep 2020 12:30:42 +0000 (05:30 -0700)
committerPeter Zijlstra <peterz@infradead.org>
Tue, 29 Sep 2020 07:57:02 +0000 (09:57 +0200)
commitc3bb8a9fa31b99f5b7d2e45cd0a10db91349f4c9
treef412f9632a31930ff19f9e381a1159b4fc1945f5tree | snapshot
parentdbfd638889a0396f5fe14ff3cc2263ec1e1cac62commit | diff
perf/x86/msr: Add Jasper Lake support

The Jasper Lake processor is also a Tremont microarchitecture. From the
perspective of perf MSR, there is nothing changed compared with
Elkhart Lake.
Share the code path with Elkhart Lake.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1601296242-32763-2-git-send-email-kan.liang@linux.intel.com
arch/x86/events/msr.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git