arm64: zynqmp: Label whole PL part as fpga_full region
authorNava kishore Manne <nava.manne@xilinx.com>
Fri, 18 Oct 2019 16:07:33 +0000 (18:07 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 23 Oct 2019 12:31:06 +0000 (14:31 +0200)
commitc40d1cceb30b508ccac85b34eb10d62fb9f32002
treed0df30d9679caa0e85b103ddb32b093ea8ddf8b6
parent9c36339215359c7d2a04e9d4caa925a2766e5864
arm64: zynqmp: Label whole PL part as fpga_full region

This will simplify dt overlay structure for the whole PL.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
arch/arm64/boot/dts/xilinx/zynqmp.dtsi