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ARM: l2c: ux500: remove cache size override
authorRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 19 Mar 2014 01:22:05 +0000 (01:22 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 29 May 2014 23:50:19 +0000 (00:50 +0100)
commitc4a202c8ae001e7154a5fe22b64f751d37da2122
tree2fbe58f7ed0ab4af130e3f1e0d069ac088b601a7tree | snapshot
parent6716173347a87790a03fda6b8f978ac096ca7758commit | diff
ARM: l2c: ux500: remove cache size override

The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP.  Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code.  Remove them so we can find out which really need
this.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-ux500/cache-l2x0.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git