drm/xe/xe2: Update context image layouts
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 11 Aug 2023 16:06:08 +0000 (09:06 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 21 Dec 2023 16:40:25 +0000 (11:40 -0500)
commitc5fa58146ee0e55ef3e8b28c1aed705c97968336
tree7f6d6dbca407670a02f32dd2f5242cf347e64852
parent8e99b54508d6fb1a8d1c8d04128ea6634c00cb19
drm/xe/xe2: Update context image layouts

Engine register state layout has changed a bit on Xe2.  We'll also
explicitly define a BCS layout to ensure BLIT_SWCTL and BLIT_CCTL are
included.

Bspec: 65182, 60184, 55793
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/xe_lrc.c