hw/nvram: NPCM7xx OTP device model
authorHavard Skinnemoen <hskinnemoen@google.com>
Fri, 11 Sep 2020 05:20:55 +0000 (22:20 -0700)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 14 Sep 2020 13:24:59 +0000 (14:24 +0100)
commitc752bb079beb57a8527e55859ce4c416fb1663c3
tree46149cb1a7a73df44d6c3e1a4e73e10a3864ffc7
parent4e89ccd685a381981c9b295888eb269b67c3320b
hw/nvram: NPCM7xx OTP device model

This supports reading and writing OTP fuses and keys. Only fuse reading
has been tested. Protection is not implemented.

Reviewed-by: Avi Fishman <avi.fishman@nuvoton.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Alexander Bulekov <alxndr@bu.edu>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Message-id: 20200911052101.2602693-9-hskinnemoen@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/npcm7xx.c
hw/nvram/meson.build
hw/nvram/npcm7xx_otp.c [new file with mode: 0644]
include/hw/arm/npcm7xx.h
include/hw/nvram/npcm7xx_otp.h [new file with mode: 0644]