drm/amd/display: Pass DSC slice height to PSR FW
authorRobin Chen <robin.chen@amd.com>
Tue, 10 Jan 2023 08:53:55 +0000 (16:53 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 24 Jan 2023 18:26:25 +0000 (13:26 -0500)
commitc84ff24a77fa66aaf7c591cdf806456dcb5c2fcd
tree850012d2c09fde9c6719f0a9602ce1de9a087033
parent6ca7415f11af5200ab10bd420b513f846e9bfb99
drm/amd/display: Pass DSC slice height to PSR FW

[Why]
When DSC is enabled, the PSRSU seletive update region
must be multiple number of DSC slice height number.
The original solution is to overwrite the SU Y granularity
by DSC slice height in DAL driver. However, the size
of the SU Y granularity variable only has 8 bytes
and the DSC slice height may over the 8 bytes size.

[How]
Instead of overwriting the SU Y granularity value,
add a new DSC slice height pararmeter and pass it
to DMUB PSRSU FW. The PSRSU FW will refer to the
DSC slice height value and extend the SU region.

Reviewed-by: Dennis Chan <dennis.chan@amd.com>
Reviewed-by: ChunTao Tso <chuntao.tso@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Robin Chen <robin.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
drivers/gpu/drm/amd/display/dc/dc_types.h
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
drivers/gpu/drm/amd/display/modules/power/power_helpers.c
drivers/gpu/drm/amd/display/modules/power/power_helpers.h