ppc/pnv: Implement POWER10 PC xscom registers for direct controls
authorNicholas Piggin <npiggin@gmail.com>
Thu, 16 May 2024 13:44:12 +0000 (23:44 +1000)
committerNicholas Piggin <npiggin@gmail.com>
Thu, 25 Jul 2024 23:21:06 +0000 (09:21 +1000)
commitc8891955086b2fa795efb7fa0e409e32f25e5447
tree3ab5712de10e7371b2822a4c2f7f2c854a7763b3
parentca4f47752a14221a26cd2bf4710bb21ad2811a22
ppc/pnv: Implement POWER10 PC xscom registers for direct controls

The PC unit in the processor core contains xscom registers that provide
low level status and control of the CPU.

This implements "direct controls", sufficient for skiboot firmware,
which uses it to send NMI IPIs between CPUs.

POWER10 is sufficiently different from POWER9 (particularly with respect
to QME and special wakeup) that it is not trivial to implement POWER9
support by reusing the code.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
hw/ppc/pnv_core.c
include/hw/ppc/pnv_core.h