platform/chrome: cros_ec_lpc: add quirks for the Framework Laptop (AMD)
authorDustin L. Howett <dustin@howett.net>
Wed, 3 Apr 2024 00:47:13 +0000 (19:47 -0500)
committerTzung-Bi Shih <tzungbi@kernel.org>
Wed, 24 Apr 2024 08:46:00 +0000 (16:46 +0800)
commitc8f460d991df93d87de01a96b783cad5a2da9616
tree1c8919a8d067dbce4a29fb2400e966d12c476fed
parente4dbf9d65e421860af09e5cb44177416bb3afe80
platform/chrome: cros_ec_lpc: add quirks for the Framework Laptop (AMD)

The original Framework Laptop 13 platform (Intel 11th, 12th, and 13th
Generation at this time) uses a Microchip embedded controller in a
standard configuration.

The newer devices in this product line--Framework Laptop 13 and 16 (AMD
Ryzen)--use a NPCX embedded controller. However, they deviate from the
configuration of ChromeOS platforms built with the NPCX EC.

* The MMIO region for EC memory begins at port 0xE00 rather than the
  expected 0x900.

cros_ec_lpc's quirks system is used to address this issue.

Signed-off-by: Dustin L. Howett <dustin@howett.net>
Reviewed-by: Thomas Weißschuh <linux@weissschuh.net>
Tested-by: Thomas Weißschuh <linux@weissschuh.net>
Tested-by: Mario Limonciello <superm1@gmail.com>
Link: https://lore.kernel.org/r/20240403004713.130365-5-dustin@howett.net
Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
drivers/platform/chrome/cros_ec_lpc.c