i2c: designware: Fix RX FIFO depth define on Wangxun 10Gb NIC
authorJarkko Nikula <jarkko.nikula@linux.intel.com>
Tue, 13 Feb 2024 12:48:46 +0000 (14:48 +0200)
committerAndi Shyti <andi.shyti@kernel.org>
Tue, 27 Feb 2024 00:51:34 +0000 (01:51 +0100)
commitc94612a72ac87b0337a0d85b9263266776ed4190
tree940156d4523f727487b6233a2556f6ad52781b2e
parentbd002efaa16e4cfffc25db2d9c4669aaa2b43646
i2c: designware: Fix RX FIFO depth define on Wangxun 10Gb NIC

I believe RX FIFO depth define 0 is incorrect on Wangxun 10Gb NIC. It
must be at least 1 since code is able to read received data from the
DW_IC_DATA_CMD register.

For now this define is irrelevant since the txgbe_i2c_dw_xfer_quirk()
doesn't use the rx_fifo_depth member variable of struct dw_i2c_dev but
is needed when converting code into generic polling mode implementation.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Tested-by: Jiawen Wu <jiawenwu@trustnetic.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
drivers/i2c/busses/i2c-designware-core.h