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ARM: dts: r8a7745: initial SoC device tree
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Fri, 4 Nov 2016 21:53:38 +0000 (00:53 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Wed, 23 Nov 2016 19:52:29 +0000 (20:52 +0100)
commitc95360247bdd67d39b55f7e743153efa64e4efe3
treeb4dcaff1fcd662622a3ff16f371d566aff366914tree | snapshot
parentd05ab65b1d0b7fdd0f25439a3bf234324a419d94commit | diff
ARM: dts: r8a7745: initial SoC device tree

The  initial R8A7745 SoC device tree including CPU0, GIC, timer, SYSC, RST,
CPG, and the required clock descriptions.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7745.dtsi [new file with mode: 0644] blob
ep93xx device tree rework repo: git://git.maquefel.me/linux.git