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phy: qcom-qmp: qserdes-txrx-ufs: Add v6 register offsets
authorAbel Vesa <abel.vesa@linaro.org>
Tue, 17 Jan 2023 22:41:46 +0000 (00:41 +0200)
committerVinod Koul <vkoul@kernel.org>
Thu, 2 Feb 2023 13:03:20 +0000 (18:33 +0530)
commitc9736600a64f7d9b374838d065ef85f6bf6c3dd4
tree8c9013ff28f73f6ece0114a000f260323f0d3a30tree | snapshot
parentddf070f6c9cb8af8e9e4003c31947a3e0e3255d9commit | diff
phy: qcom-qmp: qserdes-txrx-ufs: Add v6 register offsets

The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB,
UFS and PCIE g3x2. Add the new qserdes TX RX but UFS specific offsets
in a dedicated header file.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230117224148.1914627-5-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-ufs-v6.h [new file with mode: 0644] blob
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git