media: ccs-pll: Begin calculation from OP system clock frequency
authorSakari Ailus <sakari.ailus@linux.intel.com>
Fri, 26 Jun 2020 09:56:47 +0000 (11:56 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Mon, 7 Dec 2020 14:48:45 +0000 (15:48 +0100)
commitcab27256e8b3a6529faab9fc00e40fcf60b16590
tree7dd2db6de58cc38c67601632dcd2e198ec80c5e6
parent4f3d9e6eda9d73c43003701ab837868106125d96
media: ccs-pll: Begin calculation from OP system clock frequency

The OP system clock frequency defines the CSI-2 bus clock frequency, not
the PLL output clock frequency. Both values were overwritten in the end,
but the wrong limit value was used for the OP system clock frequency,
possibly leading to too high frequencies being used.

Also remove now duplicated calculation of OP system clock frequency later
in the PLL calculator.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/media/i2c/ccs-pll.c