esp.c: zero command register when TI command terminates due to phase change
authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Fri, 12 Jan 2024 12:53:54 +0000 (12:53 +0000)
committerMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tue, 13 Feb 2024 19:37:28 +0000 (19:37 +0000)
commitcb22ce503851fde104c39670972f91f98cd79a1a
tree24411757d92092ec37d89a20ff7526e3cbdd78cf
parent036120f3af5508d69087b898c2497bb73092b3a4
esp.c: zero command register when TI command terminates due to phase change

This is the behaviour documented in the datasheet and allows the state machine
to correctly process multiple consecutive TI commands.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Helge Deller <deller@gmx.de>
Tested-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20240112125420.514425-63-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
hw/scsi/esp.c