clk: mediatek: Fix corner case of tuner_en_reg
authorChun-Jie Chen <chun-jie.chen@mediatek.com>
Tue, 14 Sep 2021 02:16:12 +0000 (10:16 +0800)
committerStephen Boyd <sboyd@kernel.org>
Tue, 14 Sep 2021 22:05:37 +0000 (15:05 -0700)
commitcb95c169e95996ea9e63b9e38aa914402cfde7e3
treee06d42493a3999e6fef4537aa0f862789ec8824d
parent01404648df2055ba79f85858528b723d678bd2a8
clk: mediatek: Fix corner case of tuner_en_reg

On MT8195, tuner_en_reg is moved to register offest 0x0.
If we only judge by tuner_en_reg, it may lead to wrong address.
Add tuner_en_bit to the check condition. And it has been confirmed,
on all the MediaTek SoCs, bit0 of offset 0x0 is always occupied by
clock square control.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210914021633.26377-4-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mediatek/clk-pll.c