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(parent: 1631f19) | patch
tcg/riscv: Implement vector shi/s/v ops
authorTANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Mon, 7 Oct 2024 02:56:58 +0000 (10:56 +0800)
committerRichard Henderson <richard.henderson@linaro.org>
Tue, 22 Oct 2024 18:57:25 +0000 (11:57 -0700)
commitcbde22f18bc7a7c16f5db1dda9030cb4786fb5f6
treeec7f87f16edf0dde440ee351f973faa137592bcctree | snapshot
parent1631f19b04fe29ba6c3c75a8c6decd3856da4853commit | diff
tcg/riscv: Implement vector shi/s/v ops

Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20241007025700.47259-11-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
tcg/riscv/tcg-target-con-set.h diff | blob | history
tcg/riscv/tcg-target.c.inc diff | blob | history
tcg/riscv/tcg-target.h diff | blob | history
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