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target/arm: Implement HSTR.TTEE
authorPeter Maydell <peter.maydell@linaro.org>
Mon, 16 Aug 2021 18:03:04 +0000 (19:03 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 26 Aug 2021 16:02:01 +0000 (17:02 +0100)
commitcc7613bfaa1f653a6eb6ff50ac45d5c5fd717052
tree542ec7f1f8e56ec4555ecd4c8fa3c4a173b6632etree | snapshot
parent665cddbe15fdc5f5c66caac62472bd5af1e23e10commit | diff
target/arm: Implement HSTR.TTEE

In v7, the HSTR register has a TTEE bit which allows EL0/EL1 accesses
to the Thumb2EE TEECR and TEEHBR registers to be trapped to the
hypervisor. Implement these traps.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210816180305.20137-2-peter.maydell@linaro.org
target/arm/cpu.h diff | blob | history
target/arm/helper.c diff | blob | history
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