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phy: qcom-qmp: qserdes-txrx: Add v6.20 register offsets
authorAbel Vesa <abel.vesa@linaro.org>
Wed, 8 Feb 2023 18:00:15 +0000 (20:00 +0200)
committerVinod Koul <vkoul@kernel.org>
Fri, 10 Feb 2023 16:58:00 +0000 (22:28 +0530)
commitcea3e9435e63237aa010e5868f9a38cfccec89f1
tree1b623238c9a18569c8ac53705389b61c921a423ctree | snapshot
parentbaf172cc04450b9a3845f0f4907c9bc8d717bc58commit | diff
phy: qcom-qmp: qserdes-txrx: Add v6.20 register offsets

The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for
PCIE g4x2. Add the new qserdes TX RX PCIE specific offsets in a
dedicated header file.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230208180020.2761766-7-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_20.h [new file with mode: 0644] blob
drivers/phy/qualcomm/phy-qcom-qmp.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git