drm/i915: Add support for starting FRL training for HDMI2.1 via PCON
authorAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Fri, 18 Dec 2020 10:37:17 +0000 (16:07 +0530)
committerJani Nikula <jani.nikula@intel.com>
Tue, 22 Dec 2020 15:54:42 +0000 (17:54 +0200)
commitced42f2df5fd8621c896faeafe7ecc0ea8b2ea81
treef19bff303c38a5d6cbe0223bb8ad96509b9d82e9
parent2f78347e36348ea95e9ac403a9ab4d5eb784087e
drm/i915: Add support for starting FRL training for HDMI2.1 via PCON

This patch adds functions to start FRL training for an HDMI2.1 sink,
connected via a PCON as a DP branch device.
This patch also adds a new structure for storing frl training related
data, when FRL training is completed.

v2: As suggested by Uma Shankar:
-renamed couple of variables for better clarity
-tweaked the macros used for correct semantics for true/false
-fixed other styling issues.

v3: Completed the TODO for condition for going to FRL mode.
Modified the condition to determine the required FRL b/w
based only on the Pcon and Sink's max FRL values.
Moved the frl structure initialization to intel_dp_init_connector().

v4: Fixed typo in initialization of frl structure.

v5: Always use FRL if its possible, instead of enabling only for
higher modes as done in v3.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com> (v2)
[Jani: Fixed checkpatch BRACES, CONSTANT_COMPARISON.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201218103723.30844-10-ankit.k.nautiyal@intel.com
drivers/gpu/drm/i915/display/intel_display_types.h
drivers/gpu/drm/i915/display/intel_dp.c
drivers/gpu/drm/i915/display/intel_dp.h