drm/msm/a6xx: Add missing BIT(7) to REG_A6XX_UCHE_CLIENT_PF
authorDanylo Piliaiev <dpiliaiev@igalia.com>
Sat, 25 Nov 2023 19:11:50 +0000 (11:11 -0800)
committerRob Clark <robdclark@chromium.org>
Sat, 25 Nov 2023 19:16:04 +0000 (11:16 -0800)
commitcf1aaa7d4a719f0bdd9c246c0fac8247cb54ddd7
tree7d89826c879a46130e8612bcee80d54d3c3baf0b
parent6c15808d9b7640c3209d53cd2d8d56cfbf9f7175
drm/msm/a6xx: Add missing BIT(7) to REG_A6XX_UCHE_CLIENT_PF

Downstream always set BIT(7)

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/568930/
drivers/gpu/drm/msm/adreno/a6xx_gpu.c