dt-bindings: mtd: jedec, spi-nor: Add DT property to avoid setting SRWD bit in status...
authorAmit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Fri, 30 Jun 2023 14:22:32 +0000 (19:52 +0530)
committerTudor Ambarus <tudor.ambarus@linaro.org>
Thu, 13 Jul 2023 02:27:02 +0000 (05:27 +0300)
commitcfc2928cb213d5c20b6313abb2d603c0c60d7637
treea6bf0e437305851e21988a4b1883fac54d33d374
parent06c2afb862f9da8dc5efa4b6076a0e48c3fbaaa5
dt-bindings: mtd: jedec, spi-nor: Add DT property to avoid setting SRWD bit in status register

If the WP# signal of the flash device is either not connected or is wrongly
tied to GND (that includes internal pull-downs), and the software sets the
status register write disable (SRWD) bit in the status register then the
status register permanently becomes read-only. To avoid this added a new
boolean DT property "no-wp". If this property is set in the DT then the
software avoids setting the SRWD during status register write operation.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20230630142233.63585-2-amit.kumar-mahapatra@amd.com
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml