riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HW
authorJisheng Zhang <jszhang@kernel.org>
Mon, 25 Dec 2023 04:42:07 +0000 (12:42 +0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 10 Jan 2024 04:18:20 +0000 (20:18 -0800)
commitd0fdc20b0429150c9dd09111f9b1d9d48117b56f
tree93429751a6d0d27648e673c032c1d6555b312ca2
parentb6da6cbe13ebf24716438de71d50573b9f36f35d
riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HW

DCACHE_WORD_ACCESS uses the word-at-a-time API for optimised string
comparisons in the vfs layer.

This patch implements support for load_unaligned_zeropad in much the
same way as has been done for arm64.

Here is the test program and step:

 $ cat tt.c
 #include <sys/types.h>
 #include <sys/stat.h>
 #include <unistd.h>

 #define ITERATIONS 1000000

 #define PATH "123456781234567812345678123456781"

 int main(void)
 {
         unsigned long i;
         struct stat buf;

         for (i = 0; i < ITERATIONS; i++)
                 stat(PATH, &buf);

         return 0;
 }

 $ gcc -O2 tt.c
 $ touch 123456781234567812345678123456781
 $ time ./a.out

Per my test on T-HEAD C910 platforms, the above test performance is
improved by about 7.5%.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Link: https://lore.kernel.org/r/20231225044207.3821-3-jszhang@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/Kconfig
arch/riscv/include/asm/asm-extable.h
arch/riscv/include/asm/word-at-a-time.h
arch/riscv/mm/extable.c