hw/riscv/riscv-iommu: parametrize CAP.IGS
authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>
Wed, 6 Nov 2024 13:34:02 +0000 (10:34 -0300)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 20 Dec 2024 01:19:16 +0000 (11:19 +1000)
commitd13346d105c396e0d95851b58f52cac43ad55952
treed7026ac10f23c839671f0b8722ba9cd707ba0d0a
parent4876e6f7b51cf7dcbfaa43ae323e51ce9ebfcf79
hw/riscv/riscv-iommu: parametrize CAP.IGS

Interrupt Generation Support (IGS) is a capability that is tied to the
interrupt deliver mechanism, not with the core IOMMU emulation. We
should allow device implementations to set IGS as they wish.

A new helper is added to make it easier for device impls to set IGS. Use
it in our existing IOMMU device (riscv-iommu-pci) to set
RISCV_IOMMU_CAPS_IGS_MSI.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241106133407.604587-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/riscv/riscv-iommu-bits.h
hw/riscv/riscv-iommu-pci.c
hw/riscv/riscv-iommu.c
hw/riscv/riscv-iommu.h