RISC-V: Fix the typo in Scountovf CSR name
authorAtish Patra <atishp@rivosinc.com>
Sat, 20 Apr 2024 15:17:17 +0000 (08:17 -0700)
committerAnup Patel <anup@brainfault.org>
Mon, 22 Apr 2024 05:43:42 +0000 (11:13 +0530)
commitd1927f64e0e1094f296842e127138cb5f3bf3c6d
tree26808337043ea2c0cbebc2238f1353533eaa26f7
parent9752fed8f67c258213535d72f7669279921a6491
RISC-V: Fix the typo in Scountovf CSR name

The counter overflow CSR name is "scountovf" not "sscountovf".

Fix the csr name.

Fixes: 4905ec2fb7e6 ("RISC-V: Add sscofpmf extension support")
Reviewed-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-2-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/asm/csr.h
drivers/perf/riscv_pmu_sbi.c