clk: renesas: r8a779f0: Correct PFC/GPIO parent clock
authorGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 25 Jan 2024 15:45:13 +0000 (16:45 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 13 Feb 2024 16:13:25 +0000 (17:13 +0100)
commitd1b32a83a02d9433dbd8c5f4d6fc44aa597755bd
tree99688cb0879226b235bd0a7b9a116b30ef49c540
parentabb3fa662b8f8eaed1590b0e7a4e19eda467cdd3
clk: renesas: r8a779f0: Correct PFC/GPIO parent clock

According to the R-Car S4 Series Hardware User’s Manual Rev.0.81, the
parent clock of the Pin Function (PFC/GPIO) module clock is the CP
clock.

As this clock is not documented to exist on R-Car S4, use the CPEX clock
instead.

Fixes: 73421f2a48e6bd1d ("clk: renesas: r8a779f0: Add PFC clock")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f88ec4aede0eaf0107c8bb7b28ba719ac6cd418f.1706197415.git.geert+renesas@glider.be
drivers/clk/renesas/r8a779f0-cpg-mssr.c