fpga: altera-cvp: Preparation for V2 parts.
authorThor Thayer <thor.thayer@linux.intel.com>
Mon, 19 Aug 2019 20:48:07 +0000 (15:48 -0500)
committerMoritz Fischer <mdf@kernel.org>
Sat, 24 Aug 2019 18:38:27 +0000 (11:38 -0700)
commitd2083d040a95b923a217377dd51c27d57eecf5e6
tree4639d928110ba2bd1ed0a3fbe1fdb2470080134e
parenteb12511f0d47b4da58cc9fc1e93362081fa3331b
fpga: altera-cvp: Preparation for V2 parts.

In preparation for adding newer V2 parts that use a FIFO,
reorganize altera_cvp_chk_error() and change the write
function to block based.
V2 parts have a block size matching the FIFO while older
V1 parts write a 32 bit word at a time.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
drivers/fpga/altera-cvp.c